The next generation of semiconductor devices will benefit from thin dielectrics in order to achieve low equivalent oxide thickness. However, thin dielectrics lead to increased leakage current. High-k dielectrics have been considered as a potential candidate to replace silicon dioxide. A technique widely studied for the deposition of such high-k dielectrics is Atomic Layer Deposition (ALD). ALD has the advantage of enabling control of the dielectric thickness at the single atomic layer level.
Ge and Si tend to oxidize in air and form a so-called native oxide layer on their surface. This native oxide layer is however an insulator of relatively poor quality and its thickness is variable. A typical operation before high-k deposition is therefore the removal of this native oxide layer. For Si, this is typically performed by a cleaning step in a HF solution. The resulting surface is hydrogen terminated and therefore hydrophobic.
High-k dielectric materials tend not to nucleate properly on hydrophobic surfaces. For instance, Gusev et al. (Microelec. Eng., 69, 145 (2003)) demonstrated that HfO2 nucleates poorly on H-terminated Si substrates, resulting in high transistor gate leakage current. A more reactive surface is required to enable chemisorption of high-k dielectric ALD precursors. Chemisorption reactions depend on reactivity and on the number of surface sites. Obtaining a complete hydrophilic surface having an as limited as possible impact on the quality of the dielectric layer is a much sought-after target. For the moment, a common approach to make the Si substrate hydrophilic is, after removal of contamination, to oxidize the Si substrate by rapid thermal oxidation. The thickness of the hydrophilic layer obtained is however difficult to control and typically relatively thick.
M. Meuris et al. (Solid State Technology, 38, 109 (1995)) discloses a method wherein a Si substrate is cleaned by a wet process involving a 30 second exposure to a 2% HF solution. This leads to the removal of the native SiO2 layer and to making the Si substrate hydrophobic. After removal of the native SiO2 layer, the substrate is reoxidized in 20 ppm O3/H2O until a 1 nm hydrophilic SiO2 layer is obtained. The thickness of the obtained silicon oxide layer is however around 1 nm, which unnecessarily increases the equivalent oxide thickness.
B. Onsia et al. (UCPSS VII, Solid State Phenomena, 103-104, 19 (2005)) discloses a similar approach wherein the ozone (O3) concentration was reduced to 1-5 ppm O3/H2O (scaled wet oxide). This approach reduced the oxide thickness down to c.a. 0.3 nm, i.e., to the thickness of a monolayer. However, the hydrophilic layer appeared incomplete. HfO2 was grown on this substrate by ALD, and RBS measurement indicated some level of substrate inhibition. Also, a poly-Si gate electrode layer grown on top of the HfO2 layer showed epitaxial alignment of some grains with the substrate, which indicated the presence of holes in the scaled wet oxide and the HfO2 layers.
Further experiments performed by L. Nyns et al. (J. Electrochem. Soc., 155, G269 (2008)) confirmed that scaled wet oxides grow in islands (see, e.g., FIG. 2B and FIG. 3). Therefore, a problem with this approach is that Si—OH moieties (good ALD nucleation sites) created thereby are present only in small oxide islands on the substrate, leaving much of the substrate surface with Si—H moieties (bad ALD nucleation sites). This leads to islands of high-k dielectric ALD materials surrounded by high-k free substrate areas.
Generally, it is desirable to develop ways to enable good high-k nucleation on a Si or Ge substrate, which keeps the equivalent oxide thickness to a minimum.
Furthermore, according to the International Technology Roadmap for Semiconductors, high-mobility materials to replace traditional Si channels will be desired to continue scaling of CMOS from the 12 nm node onward. Major issues arose in the quest for Ge and III-V channels, the most challenging of which were important defect densities and very difficult to passivate gate stack interfaces (M. Heyns and W. Tsai, MRS Bulletin 34, 485-492, 2009). An alternative could be offered by silicon/dielectric superlattices, consisting of alternating periods of silicon atoms and foreign atoms such as O, N, or C atoms. These superlattices are affirmed to offer an enhanced mobility in the lateral direction combined with reduced gate leakage in the vertical direction. Such a superlattice avoids the problem of large lattice mismatch during epi growth and offers a normal Si surface for gate stack passivation. However, the interlayer of foreign atoms between two layers of epitaxial silicon material is preferably kept as thin as possible.
Generally, it is desirable to find ways to enable good Si or Ge epitaxial growth on a Si or Ge substrate, which keeps the foreign atom interlayer as thin as possible.